High Speed Inter-CHIP USB 2.0 PHY | Arasan Chip Systems
DWTB: USB High Speed Inter-Chip (HSIC) IP: What is it? And why should I use it?
USB 2.0 Device Controller for SoC Designs | Cadence IP
USB v2.0 Soft PHY and Device Controller
USB 3.0/2.0 Combo PHY IP for SoC Designs | Cadence IP
USB 2.0/HSIC PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
USB 2.0 PHY IP core | Arasan Chip Systems
DWTB: USB High Speed Inter-Chip (HSIC) IP: What is it? And why should I use it?
USB Universal Serial Bus
Mixed-Signal Verification for USB 2.0 Physical Layer IP
Full Speed USB 2.0 Hub Controller - EEWeb
HD1080P Webcam with Microphone PC Laptop Desktop USB Webcams Pro Streaming Computer Camera for Video Calling Recording Live Show|Cigarette Lighter| - AliExpress
Teledyne LeCroy - USB and USB Type-C® Electrical Test Solutions
The Next-Generation Interconnect | Mouser
USB2 PHY | Cadence
Teledyne LeCroy - USB and USB Type-C® Electrical Test Solutions
Webcam - Encore Electronics Inc.
USB 2.0 PHY for SoC Designs | Cadence IP
OpenFive-USB IP Subsystem-USB 3.1 Controller-USB 3.2 Retimer
Figure 2 from Verilog synthesis of USB 2.0 full-speed device PHY IP | Semantic Scholar
TUSB1210-Q1 data sheet, product information and support | TI.com
USB 2.0 PHY IP Core Device Host OTG Hub in TSMC, 28HPC, 40LP /LL, UMC, 40LP, 28HPC, SMIC 14SF, SF, 55LL, 40LL - T2M-IP